What is the definition of the IEEE802.3 address of the network port PHY

This article shows you what is the definition of the IEEE802.3 address of PHY, which is concise and easy to understand. It will definitely brighten your eyes. I hope you can get something through the detailed introduction of this article.

The address space of PHY registers is 5 bits, and up to 32 registers can be defined from 0 to 31 (with the increasing functionality of chips, many PHY chips use paging technology to expand the address space to define more registers). IEEE802.3 defines the function of 16 registers with addresses 0-15, and registers with addresses 16-31 are left to chip manufacturers to define freely, as shown in the following table:

Note:

Figures B and E above indicate whether registers are basic or extended under a particular interface. For example, under the MII interface, only the 0 and 1 registers are basic, and the others are extended. The extension is reserved for the future expansion features of IEEE, not for PHY manufacturers. PHY manufacturers can only customize the 16031register.

In IEEE standard documents and some PHY manuals, the bit of a register is expressed as X. y, for example, 0.15 represents the 15th bit of the zero register.

In addition, including the introduction of MII,RMII,GMII,RGMII, you can also refer to https://blog.csdn.net/sternlycore/article/details/89065789

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