How to build verilog Learning Environment by Linux

This article introduces the knowledge of "how to build a verilog learning environment in Linux". In the operation of actual cases, many people will encounter such a dilemma. Then let the editor lead you to learn how to deal with these situations. I hope you can read it carefully and be able to achieve something!

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Preface

One of the original purposes of writing this article is to share it with readers who want to enter the field of IC and to thank a distinguished person. VerilogHDL is the most popular hardware description language in China. I won't talk much about hardware description language here. I'll talk about hardware description language in another article, which is dedicated to readers who want to learn verilog but don't have the right tools. The content of this article is partly demonstrated by the author and partly from the network.

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Tools section

The recommended tools here are iverilog and gtkwave.

Use the command sudo apt-get install iverilog to install under linux/ubuntu.

Other platforms can be installed using the corresponding package manager.

Colleague iverilog supports the windows platform, and you can download the required version from http://bleyer.org/icarus/.

Installation is a simple process, and it is believed that people with experience in using linux or ubuntu will be able to complete it.

Use the command man iverilog here to view the user's manual.

Installing iverilog installs vvp as well.

Vvp is the policy software of verilog.

After completing the above steps, continue to install gtkwave.

The Linux/Ubuntu platform uses the sudo apt-get install gtkwave command to install gtkwave.

Gtk is used to view simulation waveforms.

After installation, you can use the which command to see where the command is located.

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The use of tools

First, let's take a look at a piece of code. Here is a simple counter as an example.

Then write a testbench.

`timescale 1ns/1ns

This time scale must be clearly marked in module and testbench.

$dumpfile ("test.vcd")

$dumpvars (0, test)

These two lines are used to generate vcd waveforms. This waveform is for gtkwave.

Prepare the necessary code.

Now get ready to use the tools to do it.

Execute iverilog commands such as iverilog-o testname count.v tb_cnt.v

Press:-o name (name is the file name of the output, is an executable file, and a .vcd waveform file appears when executing the vomiting stop, which can be viewed using gtkwave)

Use gtkwave commands such as gtkwave test.vcd

Here, you need to drag the signal from the left to the right to display.

I'm sure you can learn if you're smart.

Talk about the relevant parameters.

Iverilog:

-g2012: using this parameter, you can support some Systemverilog syntax. Easy to verify.

-o: you can specify the name of the output file, otherwise it defaults to a.out

This is the end of the content of "how to build a verilog learning environment for Linux". Thank you for your reading. If you want to know more about the industry, you can follow the website, the editor will output more high-quality practical articles for you!