The profound and simple meaning of Makefile

What is make? Why do you need make? In the C language and C++ language we learned before, we only need the gcc or Gmail + command to compile the source code. But in some large embedded projects, such as kernel compilation, easily tens of thousands of source files, is it possible for us to type the gcc command one line at a time? Certainly not, then we need a tool to replace it, and then we need makefile.

The content of this series of blogs is based on the related content of makefile in the Disciplinary Program of Ditai Software Institute. It contains a variety of basic knowledge points of the Makefile language and some less commonly used usage, which is convenient for future review.

Make and makefile

A preliminary understanding of the structure of makefile

Introduction of pseudo-target

Variables and different assignment methods

Use of predefined variables

Advanced topics for variables

Conditional judgment statement

Function definition and call

A comprehensive example of variables and functions

Automatically generate dependencies

Implicit rules of make

Path search in make

Comprehensive example of path search

Create a professional compilation environment

Support for module independent compilation

Support for the use of third party libraries

Welcome to learn makefile language, you can add me QQ:243343083.