NASA Announces Development of next Generation Aerospace Computing (HPSC) chips with 100x improvement in performance

CTOnews.com August 17, the US National Aeronautics and Space Administration (NASA) announced today that it will work with the US microcore semiconductor Microchip to design the next generation of high-performance aerospace computing (HPSC) chips, claiming that the computing performance will be 100 times that of the current aerospace computing chips.

NASA says this key capability will advance all types of future space missions, from planetary exploration to lunar and Mars landings.

Microchip will build, design and deliver HPSC chips within three years, with the goal of carrying them in future lunar and planetary exploration missions. The chip architecture of Microchip will make the computing power scalable according to the task requirements, thus improving the overall computing efficiency of the task. The design will also be more reliable and fault-tolerant.

CTOnews.com learned that NASA said the chip would make spacecraft computers 100 times faster than today's state-of-the-art spacecraft computers. As part of NASA's ongoing commercial cooperation efforts, the two sides signed a fixed-price contract valued at US $50 million (about 340 million yuan), and Microchip will provide substantial R & D costs for the completion of the project.

Wesley Powell, senior avionics technology expert at NASA, said their current spacecraft computers were developed nearly 30 years ago, and although they have performed well in past missions, future NASA missions need to significantly improve airborne computing power and reliability.