AMD Zen5 exposure: IPC increases by 22-30% and L1 cache increases. Each CCX contains 8 cores.

Thanks to CTOnews.com netizen Xiao Zhan for the clue delivery! CTOnews.com February 9, RedGamingTech's Paul revealed updates to the 2024 AMD Zen 5 CPU architecture. It was revealed that the per cycle instruction (IPC) of Zen 5 provides 22-30%, is equipped with a larger L1 cache, and each core cluster (CCX) contains eight cores.

Paul indicates that AMD Zen5 has eight cores in each core cluster (CCX). In other words, the flagship Ryzen 9 8000 SKU will have up to 4 CCX and up to 32 Zen 5 cores.

Paul initially claimed that the IPC of Zen 5 was 30% higher than that of Zen 4, but last month it revised its average target to 25%, which now ranges from 22% to 30%.

CTOnews.com also learned from the video that there are other changes to Ryzen 8000 Zen 5 CPU. AMD may significantly improve the L1 cache, and the L2 cache can achieve "unified across a CCX" across CCX. )