Tsinghua University develops ultra-high-speed optoelectronic computing chip: "break free" Moore's law, computing power increased by 3000 times

Thanks to CTOnews.com netizen Jiang Feng for the clue delivery! CTOnews.com, October 30, according to the Tsinghua News Network, Dai Qionghai, academician and Wu Jiamin, assistant professor of the Department of Automation of Tsinghua University, and associate professor Fang Lu and Qiao Fei of the Department of Electronic Engineering have jointly proposed a new computing architecture that "breaks away" from Moore's law: optoelectronic analog chips, which have more than 3000 times the computing power of current high-performance commercial chips.

The related results are published in the journal Nature in the form of article entitled "Pure Analog Optoelectronic Chip in High Speed Vision Task" (All-analog photo-electronic chip for high-speed vision tasks).

According to the report, if the running time of the vehicle is used to compare the calculation time of the information flow in the chip, then the appearance of the chip is equivalent to reducing the running time of the Beijing-Guangzhou high-speed railway from eight hours to eight seconds.

According to reports, in this small chip, the key research team of Tsinghua University creatively put forward the computing framework of optoelectronic deep fusion. Starting from the most essential physical principles, combined with optical computing based on electromagnetic wave propagation in space, and pure analog electronic computing based on Kirchhoff's law, it "breaks away" from the physical bottleneck of data conversion speed, accuracy and power consumption in the traditional chip architecture, and breaks through three international problems of large-scale computing unit integration, efficient non-linearity and high-speed optoelectronic interface on a single chip.

Under the measured performance, the system-level computing power of the optoelectronic fusion chip is thousands of times higher than that of the existing high-performance chip architecture. In the intelligent vision task and traffic scene calculation demonstrated by the R & D team, the system-level energy efficiency of the optoelectronic fusion chip has reached 74.8 Peta-OPS / W, which is more than 4 million times that of the existing high-performance chips. Figuratively speaking, the electricity originally used to supply the existing chip for an hour can supply it for more than 500 years.

Furthermore, the minimum linewidth of the optical part of the chip is only 100 nm, while the circuit part only uses 180nm CMOS technology, which has achieved several orders of magnitude performance improvement compared with the high performance chip with 7 nm process. At the same time, the materials used are simple and easy to obtain, and the cost is only a tenth of that of the latter.

Academician Dai Qionghai, Associate Professor Fang Lu, Associate researcher Qiao Fei and Assistant Professor Wu Jiamin of Tsinghua University are the co-authors of this article, and doctoral students Chen Yitong, Mai Mai Nazamat and Dr. Xu Han are the co-first authors. Dr. Meng Yao, Zhou Tianyi assistant researcher, doctoral student Li Guangpu, Fan Jingtao researcher and Wei Qi associate researcher participated in the study. This project is supported by the 2030 "New Generation artificial Intelligence" project of the Ministry of Science and Technology and the basic Science Center of the National Natural Science Foundation of China.

CTOnews.com attached a link to the paper:

Https://doi.org/10.1038/s41586-023-06558-8