The cost can be reduced by 22%. Samsung introduces 2.1D semiconductor packaging technology.

CTOnews.com November 9 news, according to South Korean media ETNews reported that Samsung in order to strengthen the competition with Intel, TSMC recently introduced the next generation (2.1D) semiconductor packaging technology, can be used to package AI chips and other high-performance semiconductors.

Image source: ETNews Samsung used silicon bridge (Silicon Bridge) instead of silicon intermediary plate (Silicon Interposer) in 2.1D package, which did not need to cover the entire semiconductor area, but only bridged the necessary area with silicon.

CTOnews.com Note: this packaging technology mainly inserts a silicon bridge (embedded ·E) in the rewiring layer (RDL). Taking the packaging of a semiconductor chip containing 12 HBM as an example, compared with the silicon intermediary board, the cost can be reduced by 22% without reducing the performance.