Intel Ultra 5135U processor exposure: 2P core + 8e core + 2LPE core
CTOnews.com November 10 news, Intel Ultra 1-generation mobile processor "Meteor Lake" will be officially launched on December 14, before a number of H-series models have been exposed, such as the Ultra 7 165H is a 6p core + 8e core + 2LPE (low power E core) core specification. Now, the U-series model Ultra 5135U in the Ultra 1 generation is exposed with a specification of 2P core + 8e core + 2LPE core.
As shown in the figure above, the Ultra 5135U processor has a 12-core 14-thread specification, a 3-level cache 12MB, and a Rui Frequency 4.4GHz. For comparison, the current i5-1335U processor is 2P core + 8e core specification, acceleration frequency 4.6GHz.
In terms of running points, the exposed Ultra 5135U has a single core of 2176 and a multi-core of 9396. For comparison, i5-1335U can reach 2300 points in a single core and 9000 points in a multi-core.
According to CTOnews.com, Intel initially released the Meteor Lake processor in September this year. Officials say the Intel Core Ultra processor, code-named Meteor Lake, is a turning point in Intel's client processor roadmap: it uses core design for the first time, using Intel4 technology and Foveros packaging technology.
The kernel display of this series of processors will be a bright spot. According to officials, the graphics module (GPU Tile) of Intel Core Ultra 1 mobile processors integrates Intel's sharp graphics architecture, which is the size of the 8Xe core, and is said to be able to provide independent graphics-level performance in integrated graphics cards, supporting ray tracing and Intel XeSS, doubling performance per watt. In addition, the new generation of nuclear display has a higher frequency, and the frequency at the same voltage can directly impact above the 2GHz. The new kernel display is also optimized for DX12U to support frame doubling and the new feature "Out of Order Sampling".
At present, Intel has not released the specific model and parameter information of Intel Core Ultra processor.