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Intel accelerates Linux software development to support Arrow Lake and Lunar Lake GPU

2024-02-28 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > IT Information >

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CTOnews.com, December 17, Intel submitted its first drm-xe-next Pull Request before the Linux 6.8 merger, replacing the traditional i915 DRM kernel driver on Linux with the latest Xe GPU driver.

In fact, Intel has supported Xe experimental features since Tiger Lake, but considering that i915 is still the dominant driver for Meteor Lake and Alchemist platforms, Intel's goal should be to make this Intel Xe driver the main driver for Lunar Lake and subsequent platforms.

CTOnews.com summarizes all the changes that Intel added to Xe2 (Battlemage) GPU as follows:

Drm/xe: Add performance tuning settings for MTL and Xe2: add performance tuning settings for MTL and Xe2

Drm / xe / xe2: Add MOCS table: add MOCS table

Drm / xe / xe2: Respond to TRTT faults as unsuccessful page fault: respond the TRTT fault to an unsuccessful page fault

Drm / xe / xe2: Add initial workarounds: add an initial solution

Drm / xe / xe2: Set tile y type in XY_FAST_COPY_BLT to Tile4: set tile y type to Tile4 in XY_FAST_COPY_BLT

Drm / xe / xe2: Update MOCS fields in blitter instructions: update the MOCS field in the blitter directive

Drm / xe / xe2: Determine bios enablement for flat ccs on igfx: determine the BIOS enabled status of flat ccs on igfx

Drm / xe / xe2: Modify main memory to ccs memory ratio: modify the ratio of main memory to CCS memory

Drm / xe / xe2: Allocate extra pages for ccs during bo create: assign additional pages to the bo during CCS creation

Drm / xe / xe2: Updates on XY_CTRL_SURF_COPY_BLT: update the relevant content of XY_CTRL_SURF_COPY_BLT

Drm / xe / xe2: Update chunk size for each iteration of ccs copy: update the block size of each iteration replicated by CCS

Drm / xe / xe2: Update emit_pte to use compression enabled PAT index: update emit_pte to use PAT indexes with compression enabled

Drm / xe / xe2: Handle flat ccs move for igfx: handles flat ccs mobile operations on igfx.

Drm / xe / xe2: Modify xe_bo_test for system memory: modify the xe_bo_test to fit the system memory.

Drm / xe / xe2: Support flat ccs: supports flat ccs.

Drm / xe / xe2: Extend reserved stolen sizes: extends the reserved occupancy size.

Drm / xe / xe2: Add missing mocs entry: add missing mocs entries.

Drm / xe / xe2: Follow XeHPC for TLB invalidation: follow XeHPC to invalidate TLB.

Drm / xe / xe2: Add one more bit to encode PAT to ppgtt entries: add an extra bit to the encoding of the PAT to ppgtt entry.

Drm / xe / pat: Add debugfs node to dump PAT: add a debugfs node to dump the PAT.

Drm / xe / xe2: Update render / compute context image sizes: update rendering / calculate context image size

Drm / xe / xe2: Add GT topology readout: add GT topology readout

Drm / xe / xe2: Add MCR register steering for primary GT adds the MCR register control of the main GT

Drm / xe / xe2: Add MCR register steering for media GT: add MCR register control for media GT

Drm / xe / xe2: Update context image layouts: update context image layout

Drm / xe / xe2: Handle fused-off CCS engines: CCS engine for handling circuit breakers

Drm / xe / xe2: uxCCS is no longer used: abandon AuxCCS

Drm / xe / xe2: Define Xe2_LPG IP features: define Xe2_LPG IP functionality

Drm / xe / xe2: Define Xe2_LPM IP features: define Xe2_LPM IP functionality

Drm / xe / xe2: Track VA bits independently of max page table level: track VA bits independently of the maximum page table level

Drm / xe / xe2: Program GuC's MOCS on Xe2 and beyond: MOCS for programming GuC on Xe2 and later

Drm / xe / xe2: Program correct MOCS registers: programming for the correct MOCS register

Drm / xe / xe2: Update SVG state handling: update SVG status processing

Drm / xe / xe2: Program PAT tables: programming PAT table

In addition to the Xe graphics driver, Intel has introduced support for next-generation products for existing software packages, such as Intel VC Intrinsics, which already has support for Arrow Lake and Lunar Lake graphics architectures. This means that the Xe-LPG+ (Arrow Lake / Alchemist) and Xe2 (Lunar Lake / Battlemage) architectures have gained support for the software, demonstrating Intel's enthusiasm in Linux development.

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