Network Security Internet Technology Development Database Servers Mobile Phone Android Software Apple Software Computer Software News IT Information

In addition to Weibo, there is also WeChat

Please pay attention

WeChat public account

Shulou

Die Shots diagram of Intel Core Ultra "Meteor Lake" CPU exposed

2024-05-23 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > IT Information >

Share

Shulou(Shulou.com)12/24 Report--

CTOnews.com December 22 news, source HXL (@ 9559pro) recently tweeted sharing Die Shots images of Intel Core Ultra processors.

Intel Core Ultra "Meteor Lake" CPU is based on the Disaggregated Architecture architecture and uniformly encapsulates all kinds of IP in the form of chiplet.

According to the exposed Die Shots diagram, the Meteor Lake processor has four chiplets, including computing (CPU), graphics (GPU), SOC (NPU, etc.) and I / O these four tile.

All four tile are packaged internally and externally, meaning that some of the tiles is packaged by Intel and the rest by third-party fabs such as TSMC.

The main CPU tile is packaged in Intel 4 (7nm) EUV process, while SOC Tile and IOE Tile are packaged in TSMC's N6 (6nm) process.

Another major component of Meteor Lake CPU is iGPU (Tiled-GPU), the new name is iGPU (Tiled-GPU), TSMC's 5nm process node.

CTOnews.com briefly combs the four Tile of Meteor Lake CPU as follows:

Intel Meteor Lake Compute Tile: Intel 4 (7nm) EUV

Intel Meteor Lake Graphics Tile: TSMC 5nm

Intel Meteor Lake SOC Tile: TSMC 6nm

Intel Meteor Lake IO Tile: TSMC 6nm

Meteor Lake complete Die Shot Picture 2 "8" 2 SKU can be seen in this Die Shot picture, including:

Two P cores based on Redwood Cove

8 E cores based on Crestmont

Two low power E cores based on the same Crestmont

The first 2 P cores and 8 E cores are located in the CPU Tiles, where you can see the two large P cores at the top, and then the smaller 8 E cores at the bottom.

The big chunk in the middle of the Intel Meteor Lake Compute CPU Tile is the cache. In this configuration, there is a total of 12 MB of smart cache, Redwood Cove P-Cores has 2 MB L2 per core, and each cluster of Crestmont E-Cores contains 4 MB L2 cache.

On GPU Tile, you can see four Xe-Core versions based on the Arc Akchemist architecture, while the most crowded parts seem to be SOC and I / O modules with various components, such as controllers (memory / storage / PCIe), NPU, dedicated low-power video islands, and so on.

Intel Meteor Lake GPU Tile

Meteor Lake SOC TileSOC Tile has two Crestmont LP E cores.

Meteor Lake IOE Tile

Welcome to subscribe "Shulou Technology Information " to get latest news, interesting things and hot topics in the IT industry, and controls the hottest and latest Internet news, technology news and IT industry trends.

Views: 0

*The comments in the above article only represent the author's personal views and do not represent the views and positions of this website. If you have more insights, please feel free to contribute and share.

Share To

IT Information

Wechat

© 2024 shulou.com SLNews company. All rights reserved.

12
Report